JPH0568031B2 - - Google Patents

Info

Publication number
JPH0568031B2
JPH0568031B2 JP837283A JP837283A JPH0568031B2 JP H0568031 B2 JPH0568031 B2 JP H0568031B2 JP 837283 A JP837283 A JP 837283A JP 837283 A JP837283 A JP 837283A JP H0568031 B2 JPH0568031 B2 JP H0568031B2
Authority
JP
Japan
Prior art keywords
bit
codeword
code word
data
chronologically
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired - Lifetime
Application number
JP837283A
Other languages
English (en)
Japanese (ja)
Other versions
JPS59135604A (ja
Inventor
Masatoshi Shinho
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Panasonic Holdings Corp
Original Assignee
Matsushita Electric Industrial Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Matsushita Electric Industrial Co Ltd filed Critical Matsushita Electric Industrial Co Ltd
Priority to JP837283A priority Critical patent/JPS59135604A/ja
Publication of JPS59135604A publication Critical patent/JPS59135604A/ja
Publication of JPH0568031B2 publication Critical patent/JPH0568031B2/ja
Granted legal-status Critical Current

Links

Classifications

    • GPHYSICS
    • G11INFORMATION STORAGE
    • G11BINFORMATION STORAGE BASED ON RELATIVE MOVEMENT BETWEEN RECORD CARRIER AND TRANSDUCER
    • G11B20/00Signal processing not specific to the method of recording or reproducing; Circuits therefor
    • G11B20/10Digital recording or reproducing
    • G11B20/14Digital recording or reproducing using self-clocking codes
    • G11B20/1403Digital recording or reproducing using self-clocking codes characterised by the use of two levels
    • G11B20/1423Code representation depending on subsequent bits, e.g. delay modulation, double density code, Miller code
    • G11B20/1426Code representation depending on subsequent bits, e.g. delay modulation, double density code, Miller code conversion to or from block codes or representations thereof

Landscapes

  • Engineering & Computer Science (AREA)
  • Signal Processing (AREA)
  • Signal Processing For Digital Recording And Reproducing (AREA)
JP837283A 1983-01-20 1983-01-20 デイジタル復調方法 Granted JPS59135604A (ja)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP837283A JPS59135604A (ja) 1983-01-20 1983-01-20 デイジタル復調方法

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP837283A JPS59135604A (ja) 1983-01-20 1983-01-20 デイジタル復調方法

Publications (2)

Publication Number Publication Date
JPS59135604A JPS59135604A (ja) 1984-08-03
JPH0568031B2 true JPH0568031B2 (en]) 1993-09-28

Family

ID=11691397

Family Applications (1)

Application Number Title Priority Date Filing Date
JP837283A Granted JPS59135604A (ja) 1983-01-20 1983-01-20 デイジタル復調方法

Country Status (1)

Country Link
JP (1) JPS59135604A (en])

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
EP0691750A1 (en) 1994-07-08 1996-01-10 Victor Company Of Japan, Limited Digital modulating/demodulating method and apparatus using same

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
EP0691750A1 (en) 1994-07-08 1996-01-10 Victor Company Of Japan, Limited Digital modulating/demodulating method and apparatus using same

Also Published As

Publication number Publication date
JPS59135604A (ja) 1984-08-03

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